//------------------------------------------------------------
//  Filename: vga_wrapper.v
//   
//  Author  : wlduan@gmail.com
//  Revise  : 2016-10-11 09:26
//  Description: 
//   
//  Copyright (C) 2014, YRBD, Inc. 					      
//  All Rights Reserved.                                       
//-------------------------------------------------------------
//
`timescale 1ns/1ps
 
module VGA_WRAPPER #(
    parameter integer C_M_AXI_BURST_LEN      = 64,
    parameter integer C_M_AXI_ID_WIDTH       = 1,
    parameter integer C_M_AXI_ADDR_WIDTH     = 32,
    parameter integer C_M_AXI_DATA_WIDTH     = 32,
    parameter integer C_M_AXI_AWUSER_WIDTH   = 0,
    parameter integer C_M_AXI_WUSER_WIDTH    = 0,
    parameter integer C_M_AXI_BUSER_WIDTH    = 0    
)( 
    //************* Read channel ***********  
    input  wire                                VGA_AXI_ACLK,
    input  wire                                VGA_AXI_ARESETN,
    output wire [C_M_AXI_ADDR_WIDTH-1 : 0    ] VGA_AXI_ARADDR,
    output wire [7 : 0                       ] VGA_AXI_ARLEN,
    output wire [2 : 0                       ] VGA_AXI_ARSIZE,
    output wire [1 : 0                       ] VGA_AXI_ARBURST,
    output wire [3 : 0                       ] VGA_AXI_ARCACHE,
    output wire                                VGA_AXI_ARVALID,
    input  wire                                VGA_AXI_ARREADY,
    input  wire [C_M_AXI_DATA_WIDTH-1 : 0    ] VGA_AXI_RDATA,
    input  wire [1 : 0                       ] VGA_AXI_RRESP,
    input  wire                                VGA_AXI_RLAST,
    input  wire                                VGA_AXI_RVALID,
    output wire                                VGA_AXI_RREADY, 
    //--------------------------------------------------------
    input  wire                                clk_7x_vga,
  
    output wire                                txout0_p,
    output wire                                txout0_n,
    output wire                                txout1_p,
    output wire                                txout1_n,
    output wire                                txout2_p,
    output wire                                txout2_n,
    output wire                                txout3_p,
    output wire                                txout3_n,
    output wire                                txclk_p,
    output wire                                txclk_n,

    input  wire                                mm_disp_en,   
    input  wire                                mm_menu_en,   
    input  wire                                mm_bar_hide,   
    input  wire                                video0_only,
    input  wire                                video1_only,
    input  wire                                menu_only,
    input  wire [31:0]                         video0_base_addr,
    input  wire [31:0]                         video1_base_addr,
    input  wire [31:0]                         menu_base_addr,
    input  wire [31:0]                         disp_pix_cnt  ,
    input  wire [7:0]                          menu_alpha    , 
    input  wire [7:0]                          disp_graym    , 
    input  wire [7:0]                          backlight_pwm_ctnr    ,
    output wire                                backlight_pwm, 
    output wire [31:0]                         videos_disp_cnt,
    output wire [7:0 ]                         data_flow_err 
);   
//--------------------------------------------------------
wire        disp_rd_clk;
wire        disp_rd_en ;
wire        disp_empty ;
wire [32:0] disp_dout  ;
//--------------------------------------------------------
wire [7:0]  vga_R;
wire [7:0]  vga_G;
wire [7:0]  vga_B;
wire        vga_de;
wire        vga_pclk;
wire        vga_h_sync;  
wire        vga_v_sync;  
wire        clk_vga_out; 
//--------------------------------------------------------
wire        clk_vga    = clk_vga_out;
wire        rst_vga;
wire        rstn_vga; 
//--------------------------------------------------------  
S_RESET s_1( 
    .clk      ( VGA_AXI_ACLK    ) ,  
    .sclk     ( 1'b1            ) ,
    .reset_i  ( VGA_AXI_ARESETN ) , 

    .reset_n  ( rstn_vga        ) 
); 
//--------------------------------------------------------
assign rst_vga = ~rstn_vga;
//--------------------------------------------------------
VGA_DMA_MASTER #( 
    .C_M_AXI_BURST_LEN    ( C_M_AXI_BURST_LEN    ),
    .C_M_AXI_ID_WIDTH     ( C_M_AXI_ID_WIDTH     ),
    .C_M_AXI_ADDR_WIDTH   ( C_M_AXI_ADDR_WIDTH   ),
    .C_M_AXI_DATA_WIDTH   ( C_M_AXI_DATA_WIDTH   ),
    .C_M_AXI_AWUSER_WIDTH ( C_M_AXI_AWUSER_WIDTH ),
    .C_M_AXI_WUSER_WIDTH  ( C_M_AXI_WUSER_WIDTH  ),
    .C_M_AXI_BUSER_WIDTH  ( C_M_AXI_BUSER_WIDTH  )
)
VGA_DMA_MASTER_inst0( 
    .M_AXI_ACLK           ( VGA_AXI_ACLK       ) ,
    .M_AXI_ARESETN        ( VGA_AXI_ARESETN    ) ,
    .M_AXI_ARADDR         ( VGA_AXI_ARADDR     ) ,
    .M_AXI_ARLEN          ( VGA_AXI_ARLEN      ) ,
    .M_AXI_ARSIZE         ( VGA_AXI_ARSIZE     ) ,
    .M_AXI_ARBURST        ( VGA_AXI_ARBURST    ) ,
    .M_AXI_ARCACHE        ( VGA_AXI_ARCACHE    ) ,
    .M_AXI_ARVALID        ( VGA_AXI_ARVALID    ) ,
    .M_AXI_ARREADY        ( VGA_AXI_ARREADY    ) ,
    .M_AXI_RDATA          ( VGA_AXI_RDATA      ) ,
    .M_AXI_RRESP          ( VGA_AXI_RRESP      ) ,
    .M_AXI_RLAST          ( VGA_AXI_RLAST      ) ,
    .M_AXI_RVALID         ( VGA_AXI_RVALID     ) ,
    .M_AXI_RREADY         ( VGA_AXI_RREADY     ) ,
    .disp_rd_clk          ( disp_rd_clk        ) ,
    .disp_rd_en           ( disp_rd_en         ) ,
    .disp_empty           ( disp_empty         ) ,
    .disp_dout            ( disp_dout          ) ,
    .menu_base_addr       ( menu_base_addr     ) ,
    .video0_only          ( video0_only        ) ,
    .video1_only          ( video1_only        ) ,
    .menu_only            ( menu_only          ) ,
    .video0_base_addr     ( video0_base_addr   ) ,
    .video1_base_addr     ( video1_base_addr   ) ,
    .videos_disp_cnt      ( videos_disp_cnt    ) ,
    .disp_flow_err        ( data_flow_err[1:0] ) ,
    .menu_flow_err        ( data_flow_err[3:2] ) ,
    .disp_pix_cnt         ( disp_pix_cnt       ) ,
    .vga_v_sync           ( vga_v_sync         ) ,
    .mm_disp_en           ( mm_disp_en         ) ,
    .mm_menu_en           ( mm_menu_en         ) 
);  

//--------------------------------------------------------
VGA_DRIVER 
VGA_DRIVER_inst0( 
     .clk_vga             ( clk_vga            ) ,
     .rst                 ( rst_vga            ) ,
     
     .vga_R               ( vga_R              ) ,
     .vga_G               ( vga_G              ) ,
     .vga_B               ( vga_B              ) ,
     .vga_h_sync          ( vga_h_sync         ) ,
     .vga_v_sync          ( vga_v_sync         ) ,
     .vga_de              ( vga_de             ) ,
    
     .disp_bar_en         ( ~mm_bar_hide       ) ,
     .disp_rd_clk         ( disp_rd_clk        ) ,
     .disp_rd_en          ( disp_rd_en         ) ,
     .disp_empty          ( disp_empty         ) ,
     .disp_dout           ( disp_dout          ) 
); 
//--------------------------------------------------------
VGA_BACKLIGHT  
VGA_BACKLIGHT_inst0(
     .clk_vga                ( clk_vga                    ) ,
     .rst                    ( rst_vga                    ) ,

     .backlight_pwm_ctnr     ( backlight_pwm_ctnr         ) ,
     .backlight_pwm          ( backlight_pwm              ) 
);
//--------------------------------------------------------
VGA_LVDS_DRIVER 
VGA_LVDS_DRIVER_inst0( 
	.clk_7x_vga               ( clk_7x_vga                 ) ,
	.clk_vga_out              ( clk_vga_out                ) ,
	.rst                      ( rst_vga                    ) ,
	
	.vga_R                    ( vga_R                      ) ,
	.vga_G                    ( vga_G                      ) ,
	.vga_B                    ( vga_B                      ) ,

	.vga_h_sync               ( vga_h_sync                 ) ,
	.vga_v_sync               ( vga_v_sync                 ) ,
	.vga_de                   ( vga_de                     ) ,

	.txout0_p                 ( txout0_p                   ) ,
	.txout0_n                 ( txout0_n                   ) ,

	.txout1_p                 ( txout1_p                   ) ,
	.txout1_n                 ( txout1_n                   ) ,

	.txout2_p                 ( txout2_p                   ) ,
	.txout2_n                 ( txout2_n                   ) ,

	.txout3_p                 ( txout3_p                   ) ,
	.txout3_n                 ( txout3_n                   ) ,

	.txclk_p                  ( txclk_p                    ) ,
	.txclk_n                  ( txclk_n                    ) 
); 

endmodule
